In formation equipment such as computers, a high-density DRAM which can operate at a high speed is widely used as a random-access memory.
However, the DRAM is complex in manufacturing process as compared with a general logic circuit LSI used in electronic equipment and signal processing and hence its manufacturing cost is high.
Also, the DRAM is a volatile memory of which information is lost when the supply of power is stopped. Hence, refresh operation should be carried out frequently, that is, written information (data) should be read out, amplified again and information should be written again.
For this reason, an FeRAM (ferroelectric substance memory), an MRAM (magnetic storage element) and the like are proposed as a nonvolatile memory of which information can be prevented from being lost even when the supply of power is stopped.
In the case of these memories, without supply of power, it becomes possible to keep written information for a long period of time.
Also, in the case of these memories, it is considered that if these memories are formed as nonvolatile memories, then refresh operations can be removed so that power consumption can be decreased.
However, in the above-mentioned nonvolatile memories, it becomes difficult to maintain characteristics of storage elements as a memory element constructing each memory cell is being reduced in size.
Therefore, it is difficult to reduce the element in size up to the limits of a design rule and the limits to a manufacturing process.
Accordingly, a storage element of a new type is proposed as a memory having an arrangement which is suitable for being reduced in size.
This storage element has a structure in which an ion conductor containing a certain metal is sandwiched between two electrodes.
Then, if any one of the two electrodes contains a metal contained in the ion conductor, then when a voltage is applied to the two electrodes, the metal contained in the electrode is diffused into the ion conductor as ions, whereby electric characteristics such as a resistance value or a capacitance of the ion conductor are changed.
It is possible to construct a memory device by using this characteristic (see Cited Patent Reference 1 and Cited Non-patent Reference 1, for example).
To be concrete, the ion conductor is a glass material or a semiconductor material made of a solid solution made of chalcogenide and metal. To be more concrete, the ion conductor is made of materials in which Ag, Cu, Zn are dissolved in solid into AsS, GeS, GeSe (for example, chalcogenide glass containing Ag, Cu, Zn like AsSAg, GeSeAg, GeSAg, AsSCu, GeSeCu and GeSCu is suitable) . Any one electrode of the two electrodes contains Ag, Cu, Zn (see the above-described Cited Patent Reference 1). It should be noted that the other electrode is formed of tungsten, nickel, molybdenum, platinum, metal silicide and the like which may not be substantially dissolved into materials containing the ion conductor.
Then, for example, the storage element and a diode or a selection element like a MOS transistor may be connected to form a memory cell, and these memory cells can be arrayed to construct a memory device.
In the storage element having this arrangement, when a bias voltage higher than a threshold voltage is applied to the two electrodes, conductive ions (ions such as Ag, Cu, Zn and the like) within the ion conductor are moved to the negative electrode direction to reach a negative electrode, thereby resulting in electrodeposition being generated. Further, when this electrodeposition grows like branches (dendrite), for example, and reaches a positive electrode, a current path is formed so that the resistance value of the ion conductor is changed from high resistance to low resistance. As a result, it is possible to record information on the storage element.
Also, when a voltage of a polarity opposite to that of the above-mentioned bias voltage is applied to the two electrodes, conductive ions which form the branch-like current path are dissolved into the ion conductor, whereby the current path is lost and the resistance value is returned to the initial high resistance state. As a consequence, recorded information can be erased from the storage element.
Also, apart from the above-mentioned arrangement, there is further proposed a storage element having an arrangement in which a barrier layer to limit movements of ions is inserted between the electrode and the ion conductor. It is considered that this barrier layer may be suitably made of a material to limit movements of ions although it allows electrons to be conducted in the inside thereof, for example, titanium nitride, titanium tungsten, nickel oxide and the like. Then, the barrier layer should be sufficiently decreased in thickness (less than 3 nm) in such a manner that electrons may pass the barrier layer at a desired operation voltage.
In the storage element having the arrangement in which the barrier layer is formed as described above, electrons are conducted within the barrier layer with application of a recording voltage higher than a threshold voltage, whereafter electrodeposition is advanced later on and a current path is formed between the surface of the barrier layer and the other electrode, thereby resulting in electric characteristics such as resistance being changed.
Then, a proposed cell structure is a structure in which a via-hole is formed on a part of an insulating layer formed on one electrode (lower electrode), ion conductor/barrier layer/the other electrode (upper electrode) being formed within the via-hole regardless of the existence of the barrier layer.
When the storage element has the above-mentioned structure, it is possible to make a storage element become relatively small in size (for example, in the order of 10 nm), and the storage element can be insulated from other electric constituents by the insulating layer formed on one electrode.
When the arrangement in which the storage element is formed within the via-hole as described above is manufactured, an insulating layer is deposited on the lower electrode, for example. Further, the via-hole which reaches the lower electrode is formed on the insulating layer by patterning and etching process. After that, respective layers from the ion conductor up to the upper electrode are deposited within the via-hole selectively or in a non-selective fashion.
Here, it has been described that, when respective layers are deposited in a non-selective fashion, after the respective layers were deposited, an ion conductor and an electrode film material formed on the insulating layer may be removed by a CMP (chemical mechanical polish) and/or etching technique.
Further, a resistance changing type nonvolatile memory using PCMO (PrCaMnO) as a recording film material has been reported (see Cited Non-patent reference 2).
Then, also in the case of the resistance changing type nonvolatile memory using this PCMO, a proposed cell structure has a PCMO film formed within a via-hole which is patterned by an insulating film.
Meanwhile, in a processing process to form each memory cell and which is used when a semiconductor memory device such as a DRAM is manufactured, it has been customary to use an RIE (reactive ion etching) method which is one of the etching processing methods.
By using the processing technology such as the RIE method, it is possible to easily separate the memory cells electrically and physically.
Then, when all adjacent memory cells or memory cells connected to the same selection line and memory cells connected to the adjacent non-selection line are separated electrically and physically, it is possible to decrease electric mutual interference and it is also possible to prevent unnecessary atom diffusion of impurity atoms.
In particular, since the RIE method is able to place constitutive film elements in the gas phase state by reaction with an etching gas and to remove the vapor constitutive film elements by etching from an ideal standpoint, this reactive ion etching method is free from decrease of a manufacturing yield due to re-deposition of the thus etched constitutive film elements and hence this reactive ion etching method is used widely.
[Cited Patent Reference 1]: Japanese unexamined PCT publication No. 2002-536840
[Cited Non-patent Reference 1]: NIKEEI ELECTRONICS, the issue of 2003, Jan. 20 (page 104)
[Cited Non-patent Reference 2]: Technical Digest, International Electron Devices Meeting (IEDM), 2002, p.193